二级分类
热销产品
Vivante VIP9000Pico
VeriSilicon’s Viva
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Development Tools
Today's System-on-a-Chip (SoC) designers face numerous design challenges. Reduced time-to-market force DSP-based designers to wrestle with increased functionality, verification and testing all on a condensed timetable.
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VS_SPI_03
include master and slave
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VS_SPI_02
AHB SPI with master and slave
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SMIC18_LPRASP_01_G
Generic process, Low power des
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S13_VROM_01_V1
General Process , Via 1 ROM, w
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SMIC18_VROM_01_V1ROM
Via Rom
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SMIC18_LPVROM_01_V1ROM
General Process, Low Power cir
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S55LLV25_LLRASP_01
SMIC 55nmLL Low Leakage Synchr
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VS_USB11UHCI_01
UHCI USB1.1 host controller
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